Weekly Highlights

NDRC: Chinas Mature-Node IC Capacity Ranks First in the World, Nearly 30% of Global 28nm+ Capacity, Taking On Global Mature-Process Orders

In late October, the NDRC stated at a press conference that Chinas IC R&D on key core technologies has achieved breakthroughs, with mature-node capacity ranking first worldwide; authoritative media including Peoples Daily Online published in-depth coverage on October 28. Key points:

• ●Official statement: An NDRC official noted that Chinas IC R&D on key core technologies has achieved breakthroughs, with mature-node capacity ranking first in the world.
• ●Capacity share: Chinese capacity for 28nm-and-above mature-process chips accounts for nearly 30% of the global total, while 70% of global chip application demand is concentrated in mature processes.
• ●Industry logic: Chinas IC industry has the worlds rare full-chain capability spanning design, manufacturing and packaging/testing. With overseas giants shifting capacity to high-end AI chips and a structural gap emerging in mature nodes, Chinese manufacturers with stable, reliable mature-process capacity are precisely positioned to take on global mature-process demand.
• ●Demand structure: Mature-process applications span power semiconductors, analog chips, MCUs, sensors, automotive electronics and other broad markets, with a solid demand base.
• ●Industry panorama: Disclosed in the same period, global cumulative downloads of open-source AI large models exceeded 10 billion, China accounts for over 90% of global humanoid-robot shipments, and new energy vehicle penetration reached 53.6%.

At the mature-node wafer manufacturing segment with world-leading capacity scale, driving coordination across the whole chain:

• ▲Upstream: Localization of mature-node equipment (etching, film deposition, cleaning, etc.) is accelerating, with domestic equipment being adopted in volume on mature lines.
• ▼Midstream: Mature-node foundry capacity at SMIC, Hua Hong and others; 28nm-and-above capacity covers nearly 30% of the global total.
• ●Downstream: Broad mature-process application markets covering power semiconductors, analog chips, MCUs, sensors, automotive electronics, etc.

Impact cascades through the supply chain, affecting each segment deeply:

• ■Capacity supply: Mature-node capacity ranking first marks the establishment of Chinas wafer-manufacturing scale advantage; with 70% of global chip application demand in mature processes, the demand base is solid and utilization has support.
• ■Demand capture: Overseas giants shifting to high-end AI chips have opened a structural gap in mature nodes; combined with the memory giants DDR4 exit, the window for Chinese manufacturers to take on global mature-process orders is widening further.
• ■Equipment & materials: Mature-node expansion drives volume qualification and adoption of domestic equipment and materials, raising equipment localization rates and strengthening supply chain autonomy.
• ■Competition perspective: A clear "walking on two legs" structure of mature + advanced nodes — China locks in its base with mature-node scale advantages while advancing advanced-node and specialty-process R&D.
• ■Customs perspective: Mature-node chip exports keep growing. HS classification of chips, rules of origin and export-control compliance are key supporting elements for mature-process capacity going global.

Update 1 | SK Hynix Q3 Revenue Tops KRW 100tn for the First Time, Operating Profit +632%, Record KRW 34tn Shareholder Return

On October 28, SK Hynix released its Q3 2026 financial results, setting records across the board. Key data:

• ●Revenue: KRW 104.6155tn (approx. RMB 522bn), up 328% YoY and 32% QoQ — quarterly revenue topping KRW 100tn for the first time in history.
• ●Profit: Operating profit of KRW 83.3338tn, up 632% YoY; net profit of KRW 39.7756tn — both all-time quarterly records.
• ●Shareholder return: Q3 cash dividend of KRW 14tn (KRW 20,000 per share, including a KRW 10,000 performance dividend plus a KRW 10,000 special dividend sharing the Kioxia investment gain); a planned KRW 20tn share buyback, of which KRW 10tn is to be fully cancelled.
• ●Special dividend source: The company gained approx. KRW 20tn from partially disposing of its stake in Japans Kioxia, returning about 80% of it (approx. KRW 16tn) to shareholders as a special dividend.
• ●Product strategy: Expanding HBM4 and server-oriented high-value product capacity, consolidating its world-leading HBM market share.

At the global memory-chip manufacturing leadership position, with earnings cascading through the chain:

• ▲Upstream: HBM manufacturing equipment (TSV etching, bonding equipment), EUV lithography and advanced packaging materials — expansion drives equipment and materials orders.
• ▼Midstream: SK Hynix DRAM/HBM/NAND manufacturing; world No.1 in HBM share, forming the memory big-three structure with Samsung and Micron.
• ●Downstream: Nvidia AI GPUs, AI servers and data centers; HBM high-bandwidth memory is the core memory of AI computing power.

• ■Memory super-cycle earnings fully realized with accelerated HBM4 expansion, reinforcing the memory big-three oligopoly; shareholder returns become the new normal for giants, with capex running alongside dividends and buybacks.
• ■Surging memory profits resonate with expanding capex — demand for HBM manufacturing equipment (TSV, hybrid bonding) and EUV lithography keeps growing, extending equipment/materials order visibility.
• ■HBM tightness and price hikes persist; AI server costs rise but compute demand is rigid. Tight memory supply-demand balance supports industry prosperity through 2028.
• ■Customs perspective: HBM and high-end memory import/export volumes and prices both rising — HS classification, origin determination and port inspection lead times become key variables in the memory supply chain.

Update 2 | TSMC Breaks 8-Year SRAM Scaling Bottleneck on A14 Process, Easing the AI Chip "Memory Wall"

On October 27, Cailian Press reported that TSMC achieved a key breakthrough in advanced-process technology. Key points:

• ●Technology breakthrough: On its A14 process slated for 2028 volume production, TSMC plans to shrink the high-density 6T SRAM bit-cell area to below 0.017 square microns, a reduction of more than 19%.
• ●Industry significance: This will be TSMCs first substantive SRAM cell scaling since N5 entered volume production in 2020, breaking an 8-year bottleneck.
• ●Product support: The SRAM cell shrink provides key support for raising on-chip cache (L3 cache) density in AI chips, easing the "memory wall" bottleneck in large-model inference.
• ●Process roadmap: The A14 process is planned for 2028 volume production as TSMCs key node process for the AI computing era.

At the advanced-process R&D segment; the SRAM cell is the core structure of logic-chip cache:

• ▲Upstream: EUV lithography, advanced materials and design tools — SRAM scaling relies on EUV and advanced design co-optimization.
• ▼Midstream: TSMC A14 advanced-node foundry; SRAM density determines AI-chip on-chip cache capacity.
• ●Downstream: AI chip designers such as Nvidia and AMD; cache density directly affects large-model inference performance.

• ■The SRAM cell breakthrough eases the AI-chip "memory wall," supporting large-model inference demand for on-chip storage density and further strengthening advanced-process competitiveness.
• ■The A14 node (2028 HVM) gains competitiveness, raising advanced-node foundry barriers and giving AI chip designers a higher-cache-density process option.
• ■SRAM scaling re-accelerates, putting the logic shrink roadmap back on the fast track and placing higher demands on advanced equipment and materials.
• ■Customs perspective: With import/export controls on advanced equipment and materials tightening, process breakthroughs reinforce the call for supply chain autonomy.

• 1

  Infineon Announces Worlds First 12-Inch GaN Fab with Total Investment of RMB 8.16bn

  Event: On October 27, Infineon announced the worlds first 12-inch GaN high-volume manufacturing wafer fab, with total project investment of EUR 1.1bn (approx. RMB 8.16bn). A landmark project marking the power-semiconductor industrys generational leap to 12-inch wafers, it will substantially cut GaN device unit costs, targeting AI data center power, fast charging, new energy and other applications.

  Position: Third-generation semiconductor power device manufacturing; GaN power devices for efficient power supplies and data centers.

  Impact: 12-inch GaN volume production will significantly dilute costs, accelerating GaN power device penetration into data center power, new energy and other high-value scenarios. Global power-semiconductor giants are racing into 12-inch compound semiconductors, presenting both pressure and opportunity for the domestic GaN supply chain.

  Sources: TrendForce集邦 Consulting (行家说); Infineon official site
• 2

  Chinas First 12-Inch Polycrystalline SiC Substrate Debuts in Changsha, Targeting AI Chip Thermal Bottlenecks

  Event: On October 29, Hunan Titan Future Technology announced Chinas first 12-inch polycrystalline silicon carbide (SiC) substrate. About 300mm in diameter and composed of many fine SiC crystallites, the product mainly serves as a high-thermal-conductivity support substrate in advanced packaging and high-temperature semiconductor processes, targeting thermal bottlenecks in AI chips and advanced packaging.

  Position: Semiconductor advanced packaging materials; polycrystalline SiC substrate as a high-thermal-conductivity packaging substrate.

  Impact: As AI chip power density keeps climbing, demand for high-thermal-conductivity packaging materials stands out. The domestic breakthrough in 12-inch polycrystalline SiC substrates offers a new option for advanced packaging thermal solutions, as domestic compound semiconductor materials evolve toward larger sizes and more varieties.

  Sources: IT Home; Titan Future Technology
• 3

  AXT Raises USD 545mn to Expand InP Substrate Capacity, Reshaping Indium Phosphide Supply

  Event: On October 28, AXT announced a private placement of up to USD 545mn to expand indium phosphide (InP) substrate and raw material capacity. InP substrates are core materials for optical communications and AI data center optical modules; the expansion will ease the current InP substrate supply crunch and support AI computing-connectivity infrastructure.

  Position: Compound semiconductor materials; InP substrates as the core base material for optical chips and high-speed optical modules.

  Impact: The AI data center optical interconnect segment is booming, with InP substrate tightness driving upstream expansion; capacity expansion secures optical module delivery schedules and supports AI computing network buildout, while global InP substrate competition intensifies.

  Sources: Semiconductor Today; AXT announcement
• 4

  CICT Multi-Core Fiber Boosts Transmission Capacity 32-Fold, Supporting Computing-Hub Interconnection

  Event: On October 26, the State Key Laboratory of Optical Communication Technologies and Networks at China Information and Communication Technologies Group (CICT) announced the completed verification of its multi-core fiber ultra-wideband capacity expansion solution: against the ~100Tb/s capacity ceiling of conventional C+L band commercial single-core G.652 fiber, the system raises total single-fiber transmission capacity 32-fold. The solution validates the industrialization potential of the multi-core fiber ultra-wideband expansion route, providing next-generation high-speed optical communication core technology for large computing-hub interconnection, backbone transmission and 6G bearer networks.

  Position: Optical communication technology and transmission networks; multi-core fiber is the core route for next-generation ultra-large-capacity transmission.

  Impact: Interconnection bandwidth demand among AI computing hubs is surging; multi-core fiber raises single-fiber capacity 32-fold, providing high-speed channels for large data center clusters. Industrialization of the domestic optical communication technology route supports the East-Data-West-Computing and computing network buildout.

  Sources: Cailian Press; CICT
• 5

  TrendForce: Memory Giants Exit Mature Nodes as DDR4 Supply Tightens and Contract Prices Rise

  Event: On October 28, TrendForce released a DRAM market briefing: as the three major memory makers gradually exit mature-node processes, DDR4 supply has tightened significantly, driving up consumer DRAM contract prices. Meanwhile, makers continue to channel advanced-node capacity into server high-performance products (HBM and DDR5), keeping overall supply-demand tight; the spot market is affected by soft demand and typhoon disruptions.

  Position: Memory chip supply-demand structure; DDR4 is a mature node while HBM/DDR5 occupy advanced-node capacity.

  Impact: The memory giants exit from DDR4 and other mature nodes widens the mature-node supply-demand gap, echoing Chinas world-leading mature-node capacity. Rising DDR4 contract prices support profitability across the memory chain while raising consumer storage costs; advanced-node capacity keeps tilting toward HBM, deepening the divergence between mature and advanced nodes.

  Sources: TrendForce; Securities Times

Table 1 · Key Data on Chinas Mature-Node IC Capacity

Table 2 · SK Hynix Q3 2026 Financial Results, Key Indicators

Note: In the event of discrepancies involving qualifications or compliance information, announcements by the competent authorities shall prevail; earnings figures are as disclosed by the respective companies and do not constitute investment advice.