Company Trend(Mar. 4)
TSMC secures major CIS order!
In response to the approach of AI revolution, there is a growing demand for enhanced specifications in CMOS sensors (CIS), and Sony, a global leader in CIS technology, has made layout in this field and has strategically placed substantial orders with the localized production trend, gearing up for the anticipated mass production of TSMC’s Kumamoto Fab in the fourth quarter and optimizing the utilization rate of the newly launched facility.
It is learned that Sony, being optimistic about opportunities in the automotive and consumer sectors and driven by the demand of CIS from AI, plans to leverage TSMCs 22nm process for the production of CIS components and Image Signal Processor (ISP) chips. To seize AI business opportunities, Sony has launched a cutting-edge digital signal processor (DSP) featuring AI algorithms, capable of analyzing body movements and enhancing image processing for applications like human tracking. Especially, Sony has already secured substantial orders, positioning itself as a major player in the upcoming AI generation.
TSMCs new fab at Kumamoto has opened a few days ago and is already in the equipment installation stage. Its mass production is projected to commence in the fourth quarter, mainly focusing on 40nm, 28nm, and 22nm processes, catering to clients’ mass production or wafer tape out in the automotive and industrial sectors.
Comments:
The CIS component market faced inventory adjustment for more than one year. Recently, with clients’ demand of restocking, the chip industry has ushered in an opportunity of recovery and rebound. Coupled with the effect of AI revolution, all kinds of terminals have begun to adopt lenses specially developed for AI applications. In the future, CIS components are expected to see a new wave of lens replacement needs to meet the AI lens business opportunities.
Industry experts pointed out that Sony has been a significant client of TSMC for outsourced wafer production for several years, and the both sides have cooperated for many years. With the imminent commencement of mass production at TSMC Kumamoto Fab, Sony secured a substantial portion of wafer capacity of the fab, emerging as a major client contributing to the facilitys utilization rate.
Policy Trend(Mar. 6)
USA bans the sales of AMD’s chip for the Chinese market, saying it is too powerful
According to insiders, Advanced Micro Devices Inc. (AMD) hit a US government roadblock in selling an AI chip tailored for the Chinese market, which is part of Washington’s crackdown on the export of advanced technologies to China. AMD had hoped to gain a green light from the Commerce Department of the USA to sell the AI processor to Chinese customers. As the specific situation is not disclosed, the insiders asked not to be identified. They said that the performance of the chip was lower than that of those sold by AMD outside China, to meet the export restrictions of the USA.
However, insiders said that US officials told AMD that the chip was still too powerful and that the company must obtain a license from the Commerce’s Bureau of Industry and Security to sell it. AMD didn’t give an immediate comment, while the Bureau of Industry and Security declined to comment. It’s not yet clear whether AMD is applying for a license.
The USA has been trying to limit Chinas access to cutting-edge semiconductors for developing AI models and tools used to manufacture these chips. President Joe Biden’s administration unveiled an initial set of export controls in 2022 and strengthened them last October to include more technology and curb sales to intermediary nations that might undermine the ban.
Comments:
In 2022, the US announced a ban to prevent Nvidia and AMD from selling their most powerful AI chips to China, forcing them to find a solution. NVIDIA immediately responded with a modified model with reduced performance, and AMD has not publicly discussed its efforts to develop a chip of such performance for Chin. AMD’s foothold in the Chinese AI chip industry is less than Nvidia’s, the latter had a large share of that market prior to the ban. When the ban took effect in 2022, AMD said it didn’t expect to be materially affected by the rules.
However, AMD has launched a new MI300 series, which will challenge Nvidias processors. According to insiders, this product tailored for China is called MI309. It’s not clear which Chinese customer was trying to buy the AMD AI chips. If the chipmaker chooses to move forward, that factor could influence whether the company is able to secure a license.
Company Trend（Mar. 5）
The most expensive unpacking in Intel history: the worlds first High-NA mask aligner installed
Intel obtained the worlds first High-NA EUV mask aligner from ASML, and has started to install it in its fab in Hillsborough, Oregon, USA. This mask aligner is very expensive, and it is known as one of the most expensive unpacking in history. Its price exceeds US$ 300mn and even may reach US$ 400mn as reported. Intel will use this mask aligner to learn how to use High-NA EUV technology, especially to test the use of high numerical aperture lithography through its Intel 18A and Intel 20A process technology.
Intel has completed the development of the manufacturing processes of its Intel 18A(1.8nm) and Intel 20A(2nm), of which Intel 20A is planned to be put into use in H1 2024, and the well-developed Intel 18A manufacturing technology will be used for mass production in H2 2024. This shows that Intel is full of confidence in the application of High-NA EUV technology, and plans to apply this technology to its main chip production in the next few years.
In addition, Intel also plans to introduce High-NA EUV lithography technology, which will be ahead of its competitors TSMC and Samsung. High-NA EUV mask aligner will provide a numerical aperture of 0.55. Compared with the previous EUV system equipped with a lens with a numerical aperture of 0.33, the new mask aligner has higher accuracy and can achieve higher resolution patterning to manufacture smaller transistors.
Comments:
Intel successfully acquired the worlds first High-NA EUV mask aligner, not only symbolizing the companys great leap in the field of semiconductor manufacturing technology, but also showing its firm will and outstanding strength in promoting the innovation of cutting-edge lithography technology. With the rapid development of semiconductor technology, there are increasingly strict requirements for mask aligner technology. High-NA EUV mask aligner, as a cutting-edge equipment with high-resolution imaging capability, provides a key breakthrough for chip manufacturers to build smaller, faster and more complex chips.
Although the cost of each High-NA EUV mask aligner is more than US$ 300mn, considering the fact that it can significantly improve production efficiency and chip performance, this investment is extremely valuable for Intel. With the help of the cutting-edge equipment, Intel is committed to developing Intel 18A process technology, and it is expected to achieve mass production in 2025, thus entering the advanced process field smaller than 2 nm. This will provide strong support for Intel to maintain its leading position in the highly competitive semiconductor market, and meet the new opportunities brought by the lithography technology innovation driven by the massive computing and data storage requirements in the field of AI.
Company Trend(Mar. 6)
Another semiconductor giant to shut down!
According to the news on March 6th, Tower Semiconductor (Tower) plans to suspend most of its operation in Newport Beach, USA for three weeks due to the slowdown of the industry, which will cause its nearly 700 employees to take a vacation. Tower confirmed that it would close most of its operations from April 1 to 7, and planned to close more operations from July 1 to 7 and from October 7 to 13.
In this regard, Tower announced that its Tower Newport Beach plant planned to carry out maintenance from April 1 to 7, and its wafer process plan and production will be restricted during this period. Because this is a scheduled normal maintenance, Tower will still fulfill its wafer delivery promise as planned. However, its tape out work will continue without interruption.
In its recent announcement to employees and the state Employment Development Department, Tower said its plant at 4321 Jamboree Road is seeing fewer orders as customers reduce inventory levels over the past two years. Tower said the planned three-week-long shutdowns will avoid a longer closure that could include job losses.
Comments:
In the global semiconductor industry, Tower Semiconductor is not the only example to shut down its plant, which was announced recently. Several large semiconductor manufacturers have followed suit to reduce production or shut down on a certain scale. This phenomenon shows that although there is still chip surplus caused by the “chip shortage" in the market, the industry has begun to make adaptive adjustment to respond to the new market changes.
To some extent, this adjustment is necessary and beneficial. Some time ago, many companies were forced to hoard a lot of chips due to the global shortage of chips to meet their production demand. However, with the gradual stabilization of the market, their hoarded chips began to become a burden. Therefore, by reducing production or shutting down, companies can control their inventory more accurately and avoid excessive inventory backlog, thus optimizing their supply chain management.
Domestic Trend
The worlds first 8-inch thin-film SiP & TFLN integrated wafer rolled off the line(Mar. 4)
According to the official WeChat account news of Wuhan Economic and Information Office, recently, the worlds first 8-inch SiP & TFLN integrated wafer was rolled off the line in Jiufengshan Laboratory Technology Center. This Center uses 8-inch SOI optical wafer to bond 8-inch lithium niobate wafer to integrate integrates optical transceiver function on a single chip, which is the most advanced technology in the global silicon-based compound photoelectric integration industry at present.
It is reported that the wafer can be used for the mass production of high-end optical chips with ultra-low loss and ultra-high bandwidth, and the optoelectronic integrated chip features the best comprehensive performance in the world at present. This wafer was developed by Jiufengshan Laboratory Technology Center and its important industrial partners and will be commercialized as soon as possible.
It is learned that Jiufengshan Laboratory Technology Center has successfully developed the world’s first 8-inch SiP & TFLN integrated wafer based on 8-inch TFLN wafer and its self-developed DUV lithography, micro nano dry etching, and thin film metal process, realizing that integration of a low-loss lithium niobate waveguide, high-bandwidth electro-optic modulator chip and high-bandwidth emitter chip. This achievement lays a promising industrial technology route for the development of TFLN photoelectric chips and ultra-large-scale photon integration, and provides a process solution for high-performance optical communication application scenarios.
JCET to invest nearly RMB 4.5bn in acquiring Sendis Semiconductor(Mar. 6)
According to the news of SEMI, Jiangsu Changjiang Electronics Technology Co., Ltd. (JCET) announced on March 4 that its wholly-owned subsidiary Changdian Technology Management Co., Ltd. intends to acquire 80% of the equity of Sendis Semiconductor (Shanghai) Co., Ltd. (SDS), a subsidiary of Western Digital Corporation, in cash for a consideration of about US$ 0.624bn (equivalent to RMB 4.492bn). After the completion of this transaction, Changdian Technology Management Co., Ltd. will hold 80% equity of SDS.
It is reported that JCET said that this acquisition is based on the in-depth analysis and forward-looking judgment of the global memory market. The purpose of this acquisition is to establish a closer cooperative relationship with Western Digital Corporation and expand the companys market share in the fields of memory and computing electronics.
According to the announcement, SDS, the target company, was established in 2006, located in Minhang District, Shanghai, and is mainly engaged in the packaging and testing of advanced flash memory products, mainly including iNAND flash memory modules, SD and MicroSD memory, etc. Its products are widely used in mobile communication, industry and IoT, automobiles, smart homes and consumer terminals.
Optics Valley Laboratory makes breakthrough in image chip technology(Mar. 7)
According to the news of the official WeChat account of China Optics Valley, Optics Valley Laboratory announced that the colloidal quantum dot imaging chip developed by its R&D team has achieved short-wave infrared imaging, with an area array size of 300,000, a blind pixel rate of less than 6‰, a wavelength range of 0.4-1.7 microns, a dark current density of less than 50nA/cm2, and an external quantum efficiency of more than 60%, showing superior performance.
According to the responsible person, this technology features a range of core advantages. For example, the image has a high resolution, and theoretically the pixel size is only limited by the diameter of airy disk; it is processed with low temperature solution method and is compatible with a substrate of any shape; the detection waveband is highly customizable and is not affected by substrate absorption; It can be processed by large area, compatible with the process of 12-inch CMOS wafer, and its cost is extremely low.
The R&D team of Optics Valley Laboratory spent 4 years to successfully develop the quantum dot technology. With the low-temperature solution process, the team realized a quantum dot short-wave infrared imaging chip integrated with a silicon-based chip, and its detection waveband range far exceeds that of traditional indium gallium arsenic chip, and its manufacturing cost is only less than nearly 1% of traditional chip. With the great cost advantage, Quantum dot chip will hopefully open a door to the new market.
发布日期 : 2024-03-10
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